ДОСЛІДЖЕННЯ ЛІНІЙНОЇ ФУНКЦІЇ ПІДСТАНОВКИ ДОВІЛЬНОЇ РОЗРЯДНОСТІ В КРИПТОГРАФІЧНИХ ПЕРЕТВОРЕННЯХ

Максим Бондарчук; Олександр Тесленко

doi:10.20535/kpisn.2023.1-2.263225

Vol. 136 · Issue 1-4 · 2023 Jun 1, 2020 article

Use of implementations of arbitrary bitness permutations for cryptographic transformations

Maxim Bondarchuk Corresponding КПІ ім. Ігоря Сікорського, Ukraine Ukraine

Oleksandr Teslenko Ukraine

PublishedJun 1, 2020

PDF (Ukrainian)

KPISN 1-4 VOL 136 · 1-4

VOL 136 · ISS 1-4 · 2023 View issue

Abstract

Background. Cryptographic transformations have always aroused the interest of the educated part of humanity and are an integral part of modern communications. A lot of different cryptographic algorithms exist for different tasks and requirements. Permutation functions are useful for cases where transformation speed is more critical than theoretical secrecy. Hardware implementation of such substitutions is quite simple. Objective. Investigate the model and combinational circuits for hardware implementation. Investigate algorithms for permutation functions software implementation. Investigate attack algorithms and cracking of permutation functions for cryptanalysis. Methods. The paper reviews algorithms of cryptographic transformations and their cryptanalysis for bijective permutations implemented by means of regular combinational structures of linear complexity. The proposed algorithms provide the rate of processing up to gigabits per second. The paper clarifies the algorithm of formation of elements of regular structures of permutations, specifies volumes of public and private data, reviews data formats, methods of their transfer and hardware implementation of one of the methods. The paper reviews attack types and permutation regular structure schemes cracking algorithms with experimental calculation of necessary operations quantity. The software implementation of the proposed algorithms for results calculation was developed. Results. Numerical results of the number of keys, the amount of memory required for hardware implementation and the number of required operations for cryptanalysis were obtained. Conclusions. The results show that the proposed algorithms for cryptographic transformations have a sufficient level of protection with a high-speed encryption and decryption.

Keywords

#combinational circuits #cryptanalysis #permutation functions #finite state machines

References

National Institute of Standards and Technology (2001) “Advanced Encryption Standard (AES)”. Federal Information Processing Standards. DOI 10.6028/NIST.FIPS.197.
National Institute of Standards and Technology (1999) “Data Encryption Standard (DES)”: Federal Information Processing Standards.
DSTU 7624:2014. National Standard of Ukraine. Information technologies. Cryptographic Data Security. Symmetric block transformation algorithm. Ministry of Economic Development and Trade of Ukraine, 2015 (in Ukrainian).
Корнейчук В.И., Тарасенко В.П., Тесленко А.К. Исследование сложности реализации функций на одномерном каскаде модулей // Автоматика и вычислительная техника. — 1977. — № 5. — C. 5–11.
Tarasenko, V.P., Teslenko, O.K. & Yanovska O.Y. (2010). “Vlastyvosti povnykh pidstanovok, yaki realizuyut’sya nayprostishym odnonapravlenym rehulyarnym OKKM”. [Properties of complete permutations implemented by the simplest unidirectional regular OCSU]. Radioelektronni i komp’yuterni systemy. No. 6, pp. 123-128 (in Ukrainian).
Teslenko, O.K & Bondarchuk, M.Y. (2020) “Implementation of arbitrary bitness permutations in one of the classes of linear structures”. Herald of Advanced Information Technology, Vol. 3, No. 1, 2020, pp. 406-417. DOI 10.15276/hait01.2020.7.
Gill A. Introduction to the theory of finite-state machines. New York, Toronto, Ontario, London, McGraw-Hill Book Co., Inc., 1962. 207 p.
Intel Processors and Chipsets by Platform Code Name [Electronic resource]. – Available at: https://www.intel.com/content/www/us/en/design/products-and-solutions/processors-and-chipsets/platform-codenames.html . – Active link: 15.09.2021.
Summary of Virtex-6 FPGA Features. Virtex-6 Family Overview. XILINX DS150 (v2.5). [Electronic resource]. – Available at: https://www.xilinx.com/support/documentation/data_sheets/ds150.pdf . – Active link: 20.08.2015.
Sequence A001187 – Number of connected labeled graphs with n nodes. The On-Line Encyclopedia of Integer Sequences® (OEIS®). [Electronic resource]. – Available at: http://oeis.org/A001187 . – Active link: 29.03.2021.
Nijenhuis, A. & Wilf, H. (1979). “The enumeration of connected graphs and linked diagrams”, Journal of Combinatorial Theory. Series A, Vol. 27, Issue 3, pp.356-359. DOI 10.1016/0097-3165(79)90023-2.
IEEE Standard Test Access Port and Boundary Scan Architecture 1149.1-2001. [Electronic resource]. – Available at: https://ieeexplore.ieee.org/servlet/opac?punumber=7481 . – Active link: 27.03.2008.
К. Шеннон «Работы по теории информации и кибернетике», М., ИЛ, 1963, с. 333-369
Bhattacharyya, A. (1989). “Checking experiments on sequential machines”. New York: J. Wiley and Sons. p.155.
В. Б. Кудрявцев, И. С. Грунский, В. А. Козловский. Восстановление автоматов по фрагментам поведения. Дискрет. матем., 21:2 (2009), 3–42; Discrete Math. Appl., 19:2 (2009), 113–154.
Kudryavtsev, V. B., Grunskii, I. S. & Kozlovskii, V. A. (2010). “Analysis and Synthesis of Abstract Automata”. Journal of Mathematical Sciences. Vol. 169, Issue 4, pp. 481–532. DOI: https://doi.org/10.1007/s10958-010-0058-z .
Petrenko, A. F., Yevtushenko, N. & Dsouli, R. (1994). “Grey box finite state machine base testing strategies”. Department of Computer Science and Operations Research. University of Montreal. Publication No. 991, p. 22.
Initial Resettable Machine Definition Algorithm. [Electronic resource]. – Available at: https://github.com/MaxBondarchuk/PermutationCryptanalysis/blob/master/PermutationCryptanalysis/InitialResettableTest.cs . – Active link: 07.06.2021.
Non-initial Resettable Machine Definition Algorithm. [Electronic resource]. – Available at: https://github.com/MaxBondarchuk/PermutationCryptanalysis/blob/master/PermutationCryptanalysis/NonInitialResettableTest.cs . – Active link: 07.06.2021.
Delfs, H. & Knebl, H. (2007). “Computationally Perfect Pseudorandom Bit Generators. Introduction to Cryptography”. Information Security and Cryptography. Springer. Vol. 41, No. 4, pp. 42-44. ISBN 978-3-540-49243-6. DOI 10.1145/1907450.1907523

Previous in issue Adaptive control at the channel level of the packet radio networks with a rigid strategy for accessing the radio channel Next in issue REASONS AND REGULARITIES OF THE INFLUENCE OF MAGNETIC FIELDS ON THE MECHANICAL PROPERTIES AND STRUCTURE OF DEFORMABLE METALS

§ 06 — Related

[1] National Institute of Standards and Technology (2001) “Advanced Encryption Standard (AES)”. Federal Information Processing Standards. DOI 10.6028/NIST.FIPS.197.

[2] National Institute of Standards and Technology (1999) “Data Encryption Standard (DES)”: Federal Information Processing Standards.

[3] DSTU 7624:2014. National Standard of Ukraine. Information technologies. Cryptographic Data Security. Symmetric block transformation algorithm. Ministry of Economic Development and Trade of Ukraine, 2015 (in Ukrainian).

[4] Корнейчук В.И., Тарасенко В.П., Тесленко А.К. Исследование сложности реализации функций на одномерном каскаде модулей // Автоматика и вычислительная техника. — 1977. — № 5. — C. 5–11.

[5] Tarasenko, V.P., Teslenko, O.K. & Yanovska O.Y. (2010). “Vlastyvosti povnykh pidstanovok, yaki realizuyut’sya nayprostishym odnonapravlenym rehulyarnym OKKM”. [Properties of complete permutations implemented by the simplest unidirectional regular OCSU]. Radioelektronni i komp’yuterni systemy. No. 6, pp. 123-128 (in Ukrainian).

[6] Teslenko, O.K & Bondarchuk, M.Y. (2020) “Implementation of arbitrary bitness permutations in one of the classes of linear structures”. Herald of Advanced Information Technology, Vol. 3, No. 1, 2020, pp. 406-417. DOI 10.15276/hait01.2020.7.

[7] Gill A. Introduction to the theory of finite-state machines. New York, Toronto, Ontario, London, McGraw-Hill Book Co., Inc., 1962. 207 p.

[8] Intel Processors and Chipsets by Platform Code Name [Electronic resource]. – Available at: https://www.intel.com/content/www/us/en/design/products-and-solutions/processors-and-chipsets/platform-codenames.html . – Active link: 15.09.2021.

[9] Summary of Virtex-6 FPGA Features. Virtex-6 Family Overview. XILINX DS150 (v2.5). [Electronic resource]. – Available at: https://www.xilinx.com/support/documentation/data_sheets/ds150.pdf . – Active link: 20.08.2015.

[10] Sequence A001187 – Number of connected labeled graphs with n nodes. The On-Line Encyclopedia of Integer Sequences® (OEIS®). [Electronic resource]. – Available at: http://oeis.org/A001187 . – Active link: 29.03.2021.

[11] Nijenhuis, A. & Wilf, H. (1979). “The enumeration of connected graphs and linked diagrams”, Journal of Combinatorial Theory. Series A, Vol. 27, Issue 3, pp.356-359. DOI 10.1016/0097-3165(79)90023-2.

[12] IEEE Standard Test Access Port and Boundary Scan Architecture 1149.1-2001. [Electronic resource]. – Available at: https://ieeexplore.ieee.org/servlet/opac?punumber=7481 . – Active link: 27.03.2008.

[13] К. Шеннон «Работы по теории информации и кибернетике», М., ИЛ, 1963, с. 333-369

[14] Bhattacharyya, A. (1989). “Checking experiments on sequential machines”. New York: J. Wiley and Sons. p.155.

[15] В. Б. Кудрявцев, И. С. Грунский, В. А. Козловский. Восстановление автоматов по фрагментам поведения. Дискрет. матем., 21:2 (2009), 3–42; Discrete Math. Appl., 19:2 (2009), 113–154.

[16] Kudryavtsev, V. B., Grunskii, I. S. & Kozlovskii, V. A. (2010). “Analysis and Synthesis of Abstract Automata”. Journal of Mathematical Sciences. Vol. 169, Issue 4, pp. 481–532. DOI: https://doi.org/10.1007/s10958-010-0058-z .

[17] Petrenko, A. F., Yevtushenko, N. & Dsouli, R. (1994). “Grey box finite state machine base testing strategies”. Department of Computer Science and Operations Research. University of Montreal. Publication No. 991, p. 22.

[18] Initial Resettable Machine Definition Algorithm. [Electronic resource]. – Available at: https://github.com/MaxBondarchuk/PermutationCryptanalysis/blob/master/PermutationCryptanalysis/InitialResettableTest.cs . – Active link: 07.06.2021.

[19] Non-initial Resettable Machine Definition Algorithm. [Electronic resource]. – Available at: https://github.com/MaxBondarchuk/PermutationCryptanalysis/blob/master/PermutationCryptanalysis/NonInitialResettableTest.cs . – Active link: 07.06.2021.

[20] Delfs, H. & Knebl, H. (2007). “Computationally Perfect Pseudorandom Bit Generators. Introduction to Cryptography”. Information Security and Cryptography. Springer. Vol. 41, No. 4, pp. 42-44. ISBN 978-3-540-49243-6. DOI 10.1145/1907450.1907523

Use of implementations of arbitrary bitness permutations for cryptographic transformations

Abstract

Keywords

References

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